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HV4530 Datasheet, PDF (1/6 Pages) Supertex, Inc – 32-Channel Serial To Parallel Converter with P-Channel Open Drain Outputs
32-Channel Serial To Parallel Converter
with P-Channel Open Drain Outputs
Ordering Information
Device
HV4530
HV4630
Recommended
Operating
VPP Max
-300
-300
44 J-Lead Quad
Plastic Chip Carrier
HV4530PJ
HV4630PJ
Package Options
44 Quad Plastic
Gullwing
HV4530PG
HV4630PG
Die
HV4530X
HV4630X
HV4530
HV4630
Features
❑ Processed with HVCMOS Technology
❑ Output voltages to -300V
❑ Source current minimum 60 mA
❑ Shift register speed 8 MHz
❑ Polarity and blanking inputs
❑ CMOS compatible inputs
❑ Forward and reverse shifting options
❑ 44-lead plastic and ceramic surface mount packages
❑ Hi-Rel processing available
❑ Can be used with the HV55 and HV56 to provide 300V
push pull operation
Absolute Maximum Ratings1
Supply voltage, VDD
Off state output voltage
HV4630
+0.5V to -16V
+0.5V to -315V
HV4622
+0.5V to -240V
Logic input levels
Ground current2
+0.5V to VDD - 0.3V
1.5A
Continuous total power dissipation 3
1200mW
Operating temperature range
-40°C to +85°C
Storage temperature range
-65°C to +150°C
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
260°C
Notes:
1. All voltages are referenced to VSS.
2. Duty cycle is limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plastic and at 15mW/°C for ceramic.
General Description
The HV45 and HV46 are low-voltage serial to high-voltage
parallel converters with P-Channel open drain outputs. These
devices have been designed for use as drivers for AC-electrolu-
minescent displays. They can also be used in any application
requiring multiple output high-voltage current source capabilities
such as driving inkjet and electrostatic print heads, plasma
panels, or vacuum fluorescent displays.
These devices consist of a 32-bit shift register, 32 data latches,
and control logic to perform polarity and blanking functions. Data
is shifted through the shift register on the logic high-to-low
transition of the clock. The HV45 shifts in the counterclockwise
direction when viewed from the top of the package and the HV46
shifts in the clockwise direction. A data output buffer is provided
for cascading devices. This output reflects the current status of
the last bit of the shift register. The data in the shift register is
latched when the latch enable pin is brought to logic high and then
returned to ground. If the latch enable pin is held high, the latch
becomes transparent and the shift register data is directly re-
flected in the outputs.
For applications requiring active pull down as well as pull up, the
HV45 and HV46 can be paired with the HV55 and HV56 devices,
respectively.
03/13/02
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod1ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.