HV3418 Datasheet, PDF (1/5 Pages) Supertex, Inc – 64-Channel Serial To Parallel Converter With High Voltage Push-Pull Outputs

HV3418
64-Channel Serial To Parallel Converter
With High Voltage Push-Pull Outputs
Ordering Information
Device
HV3418
Recommended
Operating
V_PP Max
180V
80-Lead
Quad Cerpak
Gullwing
HV3418DG
Package Options
80-Lead
Quad Plastic
Gullwing
HV3418PG
Die
HV3418X
Features
❏ HVCMOS^® technology
❏ Output voltages up to 180V
❏ Low power level shifting
❏ Shift register speed: 6MHz @ V_DD = 5V
12MHz @ V = 12V
DD
❏ Latched data outputs
❏ Output polarity and blanking
❏ CMOS compatible inputs
❏ Forward and reverse shifting options
Absolute Maximum Ratings¹
Supply voltage, V_DD
Supply voltage, V_PP
Logic input levels
Ground current²
-0.5V to +15V
V_DD to +200V
-0.5V to V_DD +0.5V
1.5A
High voltage supply current²
1.3A
Continuous total power dissipation³ Ceramic
Plastic
1900mW
1200mW
Operating temperature range
Ceramic -55°C to +125°C
Plastic -40°C to +85°C
Storage temperature range
-65°C to +150°C
Notes:
1. All voltages are referenced to GND.
2. Connection to all power and ground pads is required. Duty cycle is limited by
the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plastic and at 31.7mW/°C for ceramic.
General Description
The HV34 is a low voltage serial to high voltage parallel converter
with push-pull outputs. This device has been designed for use as
a printer driver for inkjet applications. It can also be used in any
application requiring multiple output high voltage, low current
sourcing and sinking capabilities.
The device consists of a 64-bit shift register, 64 latches, and
control logic to perform the polarity select and blanking of the
outputs. A DIR pin controls the direction of data shift through the
device. With DIR grounded, D_IOA is Data-In and D_IOB is Data-Out;
data is shifted from HV_OUT64 to HV_OUT1. When DIR is at logic high,
D_IOB is Data-In and D_IOA is Data-Out: data is then shifted from
HV_OUT1 to HV_OUT64. Data is shifted through the shift register on
the low to high transition of the clock. Data output buffers are
provided for cascading devices. Operation of the shift register is
not affected by the LE (latch enable), BL (blanking), or the POL
(polarity) inputs. Transfer of data from the shift register to the latch
occurs when the LE (latch enable) is high. The data in the latch is
stored during LE transition from high to low.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and s1pecifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.