HV302 Datasheet, PDF (1/10 Pages) Supertex, Inc – Sequencing Hotswap Controllers

HV302
HV312
__________________________________________________________________________________________________________________
Initial Release
Sequencing Hotswap Controllers
(Negative Supply Rail)
Features
General Description
-10V to 90V or +10V to +90V Operation
Four PWRGD Flags with Programmable Delays
Integrated “normally-on” Gate Clamp eliminates components
UV/OV Lock Out & Power-On-Reset (POR) for Debouncing
Sense resistor programmed Circuit Breaker & Servo Limit
Programmable Circuit Breaker Delay
Inrush control using either: Servo or Feedback Capacitor
Feedback to RAMP pin saves gate protection components
100ms Start Up Timeout Protection for Output Overload
Programmable Inrush Current di/dt Control
Programmable Auto-Retry (tens of seconds if desired)
Auto-Retry or Latched Operation
Application solution for input voltage step (diode “ORing”)
Enable through Open Drain interface to UV or OV
Low Power, 0.6mA Active Mode, 0.4mA Sleep Mode
Small SOIC-14 Package
Applications
-48V Telecom and Networking
-24V Cellular and Fixed Wireless Systems
-24V PBX Systems
Power Over LAN (IEEE802.3)
Distributed Power Systems
Power Supply Control
+48V Servers and SANs
Hotswap Control of Diode ORed Multiple Power Sources
Cooling Fan Systems
The HV302 and HV312 Hotswap Controllers perform current
limiting, circuit breaker protection, over and under voltage
detection power management functions during insertion of cards or
modules into live backplanes and connectors. They may be used
in systems where active control is implemented in the negative
lead of supplies ranging from -10V to -90V or +10V to +90V.
During initial power application the external pass device is held off
by a “normally-on” circuit that clamps its gate low. Thereafter
UV/OV and power-on-reset work together to suppress gate turn on
due to contact bounce. When stable connection has been
established for the duration of a programmed time delay, the
inrush current is controlled and limited to a programmed level
using one of two possible methods; servo mode or drain to ramp
feedback capacitor mode. When charging of the load capacitor
is completed, the open drain PWRGD-A flag is asserted. Open
drain PWRGD-B, PWRGD-C and PWRGD-D flags are asserted
sequentially after the expiration of their respective programmed
time delays. Thereafter it transitions to a low power sleep mode
and continues to monitor current and input voltage. If full charging
of the load capacitor is not achieved within 100ms or the circuit
breaker is tripped at any time, the external pass device is turned
off and all four PWRGD flags are reset to the inactive state.
Thereafter a programmable auto-retry timer will hold the pass
device off to allow it to cool before resetting and initiating auto-
retry. The auto-retry can be disabled using a single resistor if
desired.
Typical Application Circuit and Waveforms
GND
14
VDD
R1
487k
6 _UV
R2
6.81k
5 _OV
R3
9.76k
-48V
TB
TC
11
12
________
PWRGD-D / PWRGD-D
________
1
PWRGD-C /PWRGD-C
________
2
PWRGD-B / PWRGD-B
________
3
PWRGD-A / PWRGD-A ₄
HV302 / HV312
Cload
TD RAMP VEE SENSE GATE
13
10
7
8
9
100uF
RTB
RTC
RTD
C1
10nF
R4
0.0125
NOTES:
1. Under Voltage Shutdown (UV) set to 35V.
2. Over Voltage Shutdown (OV) set to 65V.
3. Current Limit set to -1A.
4. Circuit Breaker set to 8A.
C2
0.75nF
Q1
IRF530
___
EN / EN
DC/DC PWM
CONVERTER
-12V
COM
___
EN / EN
DC/DC PWM
CONVERTER
+12V
COM
___
EN / EN
DC/DC PWM
CONVERTER
+5V
COM
___
EN / EN
DC/DC PWM
CONVERTER
+3.3V
COM
1
Rev. D
04/17/02
Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: [phone] Fax: [phone] www.supertex.com