SMB119 Datasheet, PDF (25/34 Pages) Summit Microelectronics, Inc. – Seven-Channel Programmable DC-DC Power Manager

SMB119
APPLICATIONS INFORMATION (CONTINUED)
Most FETs are specified by an on resistance (RDS_ON)
for a given gate to source voltage (V_GS). It is essential
to ensure that the FETs used will always have a V_GS
voltage grater then the minimum value shown on the
datasheet. It is worth noting that the specified V_GS
voltage must not be confused with the threshold voltage
of the FET.
The input capacitance must be chosen such that the
rise and fall times specified in the datasheet do not
exceed ~5% of the switching period.
To ensure the maximum load current will not exceed
the power rating of the FET, the power dissipation of
each FET must be determined. It is important to look at
each FET individually and then add the power
dissipation of complementary FETs after the power
dissipation over one cycle has been determined. The
Power dissipation can be approximated as follows:
Equation 6: P ~ R_DSON * I _L ² *T_ON
Where T_ON is the on time of the primary switch. T_ON can
be calculated as follows:
Equations 7, 8, 9:
Buck − NFET : (1− ^VO ) *T
V_IN
Buck − PFET : ^VO *T
V_IN
Boost : (^{VO −VIN} ) *T
V_O
Compensation:
Summit provides a design tool to called Summit Power
Designer” that will automatically calculate the
compensation values for a design or allow the system
to be customized for a particular application. The power
designer software can be found at
http://www.summitmicro.com/prod_select/xls/SummitPo
werDesigner_Install.zip.
Summit Microelectronics, Inc
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