STM32F103T8U7 Datasheet, PDF (99/105 Pages) STMicroelectronics – Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces

STM32F103x8, STM32F103xB
Revision history
Table 61. Document revision history (continued)
Date
Revision
Changes
22-Nov-2007
Document status promoted from preliminary data to datasheet.
The STM32F103xx is USB certified. Small text changes.
Power supply schemes on page 15 modified. Number of communication
peripherals corrected for STM32F103Tx and number of GPIOs
corrected for LQFP package in Table 2: STM32F103xx medium-density
device features and peripheral counts.
Main function and default alternate function modified for PC14 and PC15
in, Note 6 added and Remap column added in Table 5: Medium-density
STM32F103xx pin definitions.
V_DD–V_SS ratings and Note 1 modified in Table 6: Voltage characteristics,
Note 1 modified in Table 7: Current characteristics.
Note 1 and Note 2 added in Table 11: Embedded reset and power
control block characteristics.
I_DD value at 72 MHz with peripherals enabled modified in Table 14:
Maximum current consumption in Run mode, code with data processing
running from RAM.
I_DD value at 72 MHz with peripherals enabled modified in Table 15:
Maximum current consumption in Sleep mode, code running from Flash
or RAM on page 44.
I_{DD_VBAT} typical value at 2.4 V modified and I_{DD_VBAT} maximum values
added in Table 16: Typical and maximum current consumptions in Stop
and Standby modes. Note added in Table 17 on page 48 and Table 18
on page 49. ADC1 and ADC2 consumption and notes modified in
Table 19: Peripheral current consumption.
t_SU(HSE) and t_SU(LSE) conditions modified in Table 22 and Table 23,
respectively.
4
Maximum values removed from Table 26: Low-power mode wakeup
timings. t_RET conditions modified in Table 29: Flash memory endurance
and data retention. Figure 14: Power supply scheme corrected.
Figure 20: Typical current consumption in Stop mode with regulator in
Low-power mode versus temperature at VDD = 3.3 V and 3.6 V added.
Note removed below Figure 33: SPI timing diagram - slave mode and
CPHA = 0. Note added below Figure 34: SPI timing diagram - slave
mode and CPHA = 1(1).
Details on unused pins removed from General input/output
characteristics on page 62.
Table 42: SPI characteristics updated. Table 43: USB startup time
added. V_AIN, t_{lat and} t_latr modified, note added and I_lkg removed in
Table 46: ADC characteristics. Test conditions modified and note added
in Table 49: ADC accuracy. Note added below Table 47 and Table 50.
Inch values corrected in Table 54: LQPF100, 14 x 14 mm 100-pin low-
profile quad flat package mechanical data, Table 56: LQFP64, 10 x 10
mm, 64-pin low-profile quad flat package mechanical data and Table 58:
LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package mechanical
data.
Θ_JAvalue for VFQFPN36 package added in Table 59: Package thermal
characteristics.
Order codes replaced by Section 7: Ordering information scheme.
MCU ‘s operating conditions modified in Typical current consumption on
page 47. Avg_Slope and V₂₅ modified in Table 50: TS characteristics.
I2C interface characteristics on page 70 modified.
Impedance size specified in A.4: Voltage glitch on ADC input 0 on
page 81.
Doc ID 13587 Rev 15
99/105