UM0324 Datasheet, PDF (97/105 Pages) STMicroelectronics – This user manual describes

UM0324
Appendix A Additional information
Additional information
A.1
Adjusting CPU load related to IFOC algorithm execution
The Synchronizable-PWM Timer peripheral has the built-in capability of updating PWM
registers only after a given number of PWM semi-periods. This feature is handled by a
programmable repetition counter. It is particularly useful to adjust the CPU load related to
IFOC algorithm execution for a given PWM frequency (refer to STR750 Reference Manual
for more information on programmable repetition counter).
When using ICS, the injected chain of conversions for current reading is directly triggered by
a PWM register update event. Moreover, since the IFOC algorithm is executed at the end of
the injected chain of conversions in the related ISR, changing repetition counter has a direct
impact on IFOC refresh rate and thus on CPU load.
However, in the case of three shunt topology current reading, to ensure that the IFOC
algorithm is executed once for each PWM register update, it is necessary to keep the
synchronization between current conversions triggering and PWM signal. In the proposed
software library, this is automatically performed, so that you can reduce the frequency of
execution of the IFOC algorithm by simply changing the default value of the repetition
counter (the REP_RATE parameter in the MC_Control_Param.h header file). Figure 48
shows current sampling triggering, and IFOC algorithm execution with respect to PWM
period when REP_RATE is set to 3.
Figure 48. AD conversions for three shunt topology stator currents reading and
IFOC algorithm execution when REP_RATE=3
Note:
Because three shunt resistor topology requires low side switches to be on when performing
current reading A/D conversions, the REP_RATE parameter must be an odd number in this
case.
Considering that the raw IFOC algorithm execution time is about 27.5µs when in three shunt
resistor stator current reading configuration, the related contribution to CPU load can be
computed as follows:
CPU Load_%
=
F_PWM
Refresh_Rate
⋅ 27.5 ⋅10^−6
⋅100
=
F_PWM
(REP_RATE
+ 1)/2 ^{⋅ 27.5 ⋅10−6}
⋅100
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