RM0360 Datasheet, PDF (97/727 Pages) STMicroelectronics – This reference manual targets application developers

Reset and clock control (RCC)
RM0360
Calibration of the HSI
The primary purpose of connecting the LSE, through the MCO multiplexer, to the channel 1
input capture is to be able to precisely measure the HSI system clocks (for this, the HSI
should be used as the system clock source). The number of HSI clock counts between
consecutive edges of the LSE signal provides a measure of the internal clock period. Taking
advantage of the high precision of LSE crystals (typically a few tens of ppm), it is possible to
determine the internal clock frequency with the same resolution, and trim the source to
compensate for manufacturing-process- and/or temperature- and voltage-related frequency
deviations.
The HSI oscillator has dedicated user-accessible calibration bits for this purpose.
The basic concept consists in providing a relative measurement (e.g. the HSI/LSE ratio): the
precision is therefore closely related to the ratio between the two clock sources. The higher
the ratio is, the better the measurement will be.
If LSE is not available, HSE/32 will be the better option in order to reach the most precise
calibration possible.
Calibration of the LSI
The calibration of the LSI will follow the same pattern that for the HSI, but changing the
reference clock. It will be necessary to connect LSI clock to the channel 1 input capture of
the TIM14. Then define the HSE as system clock source, the number of its clock counts
between consecutive edges of the LSI signal provides a measure of the internal low speed
clock period.
The basic concept consists in providing a relative measurement (e.g. the HSE/LSI ratio): the
precision is therefore closely related to the ratio between the two clock sources. The higher
the ratio is, the better the measurement will be.
Calibration of the HSI14
For the HSI14, because of its high frequency, it is not possible to have a precise resolution.
However a solution could be to clock Timer 14 with HSE through PLL to reach 48 MHz, and
to use the input capture line with the HSI14 and the capture prescaler defined to the higher
value. In that configuration, we got a ratio of 27 events. It is still a bit low to have an accurate
calibration. In order to increase the measure accuracy, it is advised to count the HSI periods
after multiple cycles of Timer 14. Using polling to treat the capture event will be necessary in
this case.
7.3
Low-power modes
APB peripheral clocks and DMA clock can be disabled by software.
Sleep mode stops the CPU clock. The memory interface clocks (Flash and RAM interfaces)
can be stopped by software during sleep mode. The AHB to APB bridge clocks are disabled
by hardware during Sleep mode when all the clocks of the peripherals connected to them
are disabled.
Stop mode stops all the clocks in the core supply domain and disables the PLL and the HSI,
HSI14 and HSE oscillators.
Standby mode stops all the clocks in the core supply domain and disables the PLL and the
HSI, HSI14 and HSE oscillators.
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