M24LR16E-R Datasheet, PDF (93/143 Pages) STMicroelectronics – 16-bit EEPROM with password protection, dual interface & energy harvesting: 400 kHz I²C bus & ISO 15693 RF protocol at 13.56 MHz

M24LR16E-R
Command codes
When configured in the RF busy mode, the RF WIP/BUSY pin is tied to 0 from the SOF that
starts the Reset to ready command to the end of the M24LR16E-R response.
When configured in the RF write in progress mode, the RF WIP/BUSY pin remains in high-Z
state.
26.8
Write AFI
On receiving the Write AFI request, the M24LR16E-R programs the 8-bit AFI value to its
memory. The Option_flag is supported.
During the RF write cycle W_t, there should be no modulation (neither 100% nor 10%),
otherwise, the M24LR16E-R may not write correctly the AFI value into the memory. The W_t
time is equal to t_1nom + 18 × 302 µs.
Table 57. Write AFI request format
Request Request Write
SOF _flags AFI
UID⁽¹⁾
AFI
CRC16
Request
EOF
8 bits 27h
1. Gray means that the field is optional.
64 bits
8 bits 16 bits
Request parameter:
● Request flags
● UID (optional)
● AFI
Table 58. Write AFI response format when Error_flag is NOT set
Response
SOF
Response_flags
CRC16
8 bits
16 bits
Response
EOF
Response parameter:
● No parameter
Table 59. Write AFI response format when Error_flag is set
Response Response_
SOF
flags
Error code
CRC16
8 bits
8 bits
16 bits
Response
EOF
Response parameter:
● Error code as Error_flag is set
– 12h: the specified block is locked and its contents cannot be changed
– 13h: the specified block was not successfully programmed
Doc ID 018932 Rev 8
93/143