VM6101 Datasheet, PDF (9/17 Pages) STMicroelectronics – I²C color light sensor

VM6101
4
Register description
Register description
Note:
RO = Read Only; RW = Read/Write.
Reserved bits must be written with 0s and return 0 upon read; Reserved bytes must not be
accessed otherwise unpredictable results my occur.
Table 3. Register description
Addr. Bits Def.
Name
Description
0x00
0x00
0x01
0x02
0x03
0x04
[3:0]
[7:4]
[7:0]
[6:0]
[1:0]
2
3
4
[6:5]
7
[7:0]
[2:0]
0
1
2
1 REVISION
0 MASK
0x04 N_PIXEL
0x04 CONTROL
0 CHSEL
1 INT_FSEL
0 PWM_POL
0 ADDR_SEL
0 ADDR_SELW
0
0
0x01 Y_STATUS
1 RESET
0 OVERFLOW
0 READY
Chip revision (RO).
Mask code (RO).
(RO)
Control register (RW)
Channel select for comparator and PWM logic:
0: Y
1: R
2: G
3: B
INT pin function select:
0: PWM generator output
1: Comparator logic output
PWM polarity:
0: Normal (Thin pulse for low values, Wide pulses for high values)
1: Inverted.
Address Select: when written with ‘1’, the INT pin goes high impedance;
after a duration T (defined below), the INT pin is sampled and returns to
low impedance.
The device slave address is set accordingly:
INT sampled low: address = 0x20
INT sampled high: address = 0x22.
Address select sampling window duration:
0: T = 160 µs (default)
1: T = 80 µs
2: T = 40 µs
3: T = 20 us
This duration allows for INT pin pull-up rise time.
Reserved
Reserved (RO).
Y-channel status register (RO).
Reading this register will cause Y_CNT to be transferred to serial
interface buffer. 5 MSBs are read as zeros.
This bit is set after reset. Cleared after first read of STATUS register.
This bit is set upon counter overflow: current counter values are invalid.
When set, indicates that a new count value is available in the 4 registers
here below.
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