TDA7340 Datasheet, PDF (9/16 Pages) STMicroelectronics – AUDIO SIGNAL PROCESSOR

TDA7340
NOTES TO THE CHARACTERISTICS (continued)
5. Control range typ 11% of VR (see figure 2)
6. Control range typ 30% of VR (see figure 1)
Figure 1: High Cut Control
Figure 2: Stereo Blend
SEP
(dB)
50
40
VR=3.6V
30
20
10
D94AU056
Figure 3
0
-0.4
-0.3
-0.2
-0.1 VSB-VR(V)
VMPX
DC-LEVEL
VTH
(*) All thresholds are measured by using a pulse with TR = 2µs,
THIGH = 2µs and TF = 10µs.
The repetition rate must not increase the PEAK voltage.
D94AU185
TR THIGH
TF
Time
I²C BUS INTERFACE
Interface Protocol
The interface protocol comprises:
A start condition (s)
A chip address byte, (the LSB bit determines
read/write transmission).
A subaddress byte
A sequence of data (N-bytes + acknowledge)
A stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 ... DATA n
MSB
S1000100
D95AU216
LSB
R/W
MSB
LSB
MSB
ACK X X T I A₃ A₂ A₁ A₀ ACK
DATA
ACK = Acknowledge
S = Start
P = Stop
I = Autoincrement
MAX CLOCK SPEED 500kbits/s
Autoincrement
If bit I in the subaddress byte is set to ”1”, the autoincrement of subaddress is enabled.
LSB
ACK P
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