TDA7313N Datasheet, PDF (9/14 Pages) STMicroelectronics – DIGITAL CONTROLLED STEREO AUDIO PROCESSOR WITH LOUDNESS

Figure 18: Timing Diagram of I²CBUS
Figure 19: Acknowledge on the I²CBUS
TDA7313N
SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
A start condition (s)
A chip address byte, containing the TDA7313N
address (the 8th bit of the byte must be 0). The
TDA7313N must always acknowledge at the
end of each transmitted byte.
A sequence of data (N-bytes + acknowledge)
A stop condition (P)
TDA7313N ADDRESS
MSB first byte
LSB MSB
S 1 0 0 0 1 0 0 0 ACK
DATA
LSB MSB
ACK
DATA
LSB
ACK P
ACK = Acknowledge
S = Start
P = Stop
MAX CLOCK SPEED 100kbits/s
SOFTWARE SPECIFICATION
Chip address
1
0
0
0
1
0
MSB
Data Transferred (N-bytes + Acknowledge)
0
0
LSB
DATA BYTES
MSB
0
0
1
1
1
1
1
0
1
0
0
1
0
1
0
1
B2
B1
B0
A2
A1
0
B1
B0
A2
A1
1
B1
B0
A2
A1
0
B1
B0
A2
A1
1
B1
B0
A2
A1
0
G1
G0
S2
S1
1
0
C3
C2
C1
1
1
C3
C2
C1
Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; Gx = 3.75dB steps
LSB
FUNCTION
A0
Volume control
A0
Speaker ATT LR
A0
Speaker ATT RR
A0
Speaker ATT LF
A0
Speaker ATT RF
S0
Audio switch
C0
Bass control
C0
Treble control
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