M29W008AT Datasheet, PDF (9/30 Pages) STMicroelectronics – 8 Mbit 1Mb x8, Boot Block Low Voltage Single Supply Flash Memory

M29W008AT, M29W008AB
Table 9. Instructions ⁽¹⁾
Mne.
Instr.
Cyc.
1st Cyc. 2nd Cyc. 3rd Cyc. 4th Cyc. 5th Cyc. 6th Cyc. 7th Cyc.
RD ^(2,4)
Read/Reset
Memory Array
Addr. ^(3,7)
1+
Data
Addr. ^(3,7)
3+
Data
X
F0h
555h
AAh
Read Memory Array until a new write cycle is initiated.
2AAh
55h
555h
F0h
Read Memory Array until a new write cycle is
initiated.
AS ^{(4) Auto Select}
Addr. ^(3,7)
3+
Data
555h
AAh
2AAh
55h
555h
90h
Read Electronic Signature or Block Protection
Status until a new write cycle is initiated. See Note 5
and 6.
PG Program
Addr. ^(3,7)
4
Data
555h
AAh
2AAh
55h
555h
A0h
Program
Address
Program
Data
Read Data Polling or Toggle Bit until
Program completes.
BE Block Erase
6 Addr. ^(3,7)
Data
555h
AAh
2AAh
55h
555h
80h
555h
AAh
2AAh
55h
Block
Address
30h
Additional
Block ⁽⁸⁾
30h
CE Chip Erase
6 Addr. ^(3,7)
Data
555h
AAh
2AAh
55h
555h
80h
555h
AAh
2AAh
55h
555h
10h
Note 9
Addr. ^(3,7)
ES ⁽¹⁰⁾ Erase Suspend 1
Data
X
Read until Toggle stops, then read all the data needed from any Block(s) not
B0h ^{being erased then Resume Erase.}
Addr. ^(3,7)
ER Erase Resume 1
Data
X
Read Data Polling or Toggle Bits until Erase completes or Erase is suspended
30h ^{another time.}
Note: 1. Commands not interpreted in this table will default to read array mode.
2. A wait of t_PLYH is necessary after a Read/Reset command if the memory was in an Erase or Program mode before starting any new
operation (see Tables 15, 16 and Figure 9).
3. X = Don’t Care.
4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after the com-
mand cycles.
5. Signature Address bits A0, A1, at V_IL will output Manufacturer code (20h). Address bits A0 at V_IH and A1, at V_IL will output Device
code.
6. Block Protection Address: A0, at V_IL, A1 at V_IH and A13-A19 within the Block will output the Block Protection status.
7. For Coded cycles address inputs A15-A19 are don’t care.
8. Optional, additional Blocks addresses must be entered within the erase timeout delay after last write entry, timeout statuscan be
verified through DQ3 value (see Erase Timer Bit DQ3 description). When full command is entered, read Data Polling or Toggle bit
until Erase is completed or suspended.
9. Read Data Polling, Toggle bits or RB until Erase completes.
10. During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.
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