STM32F401CD Datasheet, PDF (84/135 Pages) STMicroelectronics – Up to 12 communication interfaces

Electrical characteristics
STM32F401xD STM32F401xE
6.3.11
PLL spread spectrum clock generation (SSCG) characteristics
The spread spectrum clock generation (SSCG) feature allows to reduce electromagnetic
interferences(see Table 49: EMI characteristics for WLCSP49). It is available only on the
main PLL.
Symbol
Table 43. SSCG parameters constraint
Parameter
Min
f_Mod
md
MODEPER * INCSTEP
Modulation frequency
-
Peak modulation depth
0.25
-
1. Guaranteed by design, not tested in production.
Typ Max⁽¹⁾ Unit
-
10
KHz
-
2
%
-
2¹⁵-1
-
Equation 1
The frequency modulation period (MODEPER) is given by the equation below:
MODEPER = round[f_{PLL_IN} ⁄ (4 × f_Mod)]
f_{PLL_IN} and f_Mod must be expressed in Hz.
As an example:
If f_{PLL_IN} = 1 MHz, and f_MOD = 1 kHz, the modulation depth (MODEPER) is given by
equation 1:
MODEPER = round[10⁶ ⁄ (4 × 10³)] = 250
Equation 2
Equation 2 allows to calculate the increment step (INCSTEP):
INCSTEP = round[((2¹⁵ – 1) × md × PLLN) ⁄ (100 × 5 × MODEPER)]
f_{VCO_OUT} must be expressed in MHz.
With a modulation depth (md) = ±2 % (4 % peak to peak), and PLLN = 240 (in MHz):
INCSTEP = round[((2¹⁵ – 1) × 2 × 240) ⁄ (100 × 5 × 250)] = 126md(quantitazed)%
An amplitude quantization error may be generated because the linear modulation profile is
obtained by taking the quantized values (rounded to the nearest integer) of MODPER and
INCSTEP. As a result, the achieved modulation depth is quantized. The percentage
quantized modulation depth is given by the following formula:
md_quantized% = (MODEPER × INCSTEP × 100 × 5) ⁄ ((2¹⁵ – 1) × PLLN)
As a result:
md_quantized% = (250 × 126 × 100 × 5) ⁄ ((2¹⁵ – 1) × 240) = 2,002%(peak)
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