RM0368 Datasheet, PDF (804/841 Pages) STMicroelectronics – This Reference manual targets application developers

Debug support (DBG)
RM0368
23.4.3
Note:
Internal pull-up and pull-down on JTAG pins
It is necessary to ensure that the JTAG input pins are not floating since they are directly
connected to flip-flops to control the debug mode features. Special care must be taken with
the SWCLK/TCK pin which is directly connected to the clock of some of these flip-flops.
To avoid any uncontrolled IO levels, the device embeds internal pull-ups and pull-downs on
the JTAG input pins:
NJTRST: Internal pull-upJTDI: Internal pull-upJTMS/SWDIO: Internal pull-upTCK/SWCLK:
Internal pull-downOnce a JTAG IO is released by the user software, the GPIO controller
takes control again. The reset states of the GPIO control registers put the I/Os in the
equivalent state:
• NJTRST: AF input pull-up
• JTDI: AF input pull-up
• JTMS/SWDIO: AF input pull-up
• JTCK/SWCLK: AF input pull-down
• JTDO: AF output floating
The software can then use these I/Os as standard GPIOs.
The JTAG IEEE standard recommends to add pull-ups on TDI, TMS and nTRST but there is
no special recommendation for TCK. However, for JTCK, the device needs an integrated
pull-down.
Having embedded pull-ups and pull-downs removes the need to add external resistors.
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