TDA7440D Datasheet, PDF (8/17 Pages) STMicroelectronics – TONE CONTROL DIGITALLY CONTROLLED AUDIO PROCESSOR

TDA7440D
5 SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
■ A start condition (S)
■ A chip address byte, containing the TDA7440D
■ A subaddress bytes
■ A sequence of data (N byte + acknowledge)
■ A stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB
MSB
S 1 0 0 0 1 0 0 0 ACK X X X B
D96AU420
ACK = Acknowledge
S = Start
P = Stop
A = Address
B = Auto Increment
LSB
MSB
DATA
ACK
DATA
LSB
ACK P
5.1 EXAMPLES
5.1.1 No Incremental Bus
The TDA7440D receives a start condition, the correct chip address, a subaddress with the B = 0 (no in-
cremental bus), N-datas (all these data concern the subaddress selected), a stop condition.
CHIP ADDRESS
SUBADDRESS
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 1 0 0 0 ACK X X X 0 D3 D2 D1 D0 ACK
D96AU421
DATA
DATA
LSB
ACK P
5.1.2 Incremental Bus
The TDA7440D receive a start conditions, the correct chip address, a subaddress with the B = 1 (incre-
mental bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBADDRESS
from "XXX1000" to "XXX1111" of DATA are ignored.
The DATA 1 concern the subaddress sent, and the DATA 2 concerns the subaddress sent plus one sent
in the loop etc, and at the end it receivers the stop condition.
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 1 0 0 0 ACK X X X 1 D3 D2 D1 D0 ACK
D96AU422
DATA
LSB
ACK P
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