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| HCC40102B Datasheet, PDF (8/13 Pages) STMicroelectronics – 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS | |||
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HCC/HCF40102B/40103B
TYPICAL APPLICATIONS
Divide-by-âNâ Counter.
Programmable Timer.
Microprocessor Interrupt Timer.
Synchronous Cascading.
Microprocessor Interrupt Timer.
* An output spike (160ns @ VDD = 5V) occurs whenever two or
more devices are cascaded in the parallel-clocked mode be-
cause the clock-to-carry out delay is greater than the carry-in-to-
carry out delay. This spike is eliminated by gating the out put
of the last device with the clock as shown.
8/13
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