AN2692 Datasheet, PDF (8/29 Pages) STMicroelectronics – How to program/reprogram the ST10F269Zx Flash memory

Introduction to ST10F269Zx 0.35 µm embedded Flash memory
AN2692
Table 1. Commands for ST10 with 0.35 µm embedded Flash memory⁽¹⁾ (continued)
Instruction
Mne
Cycle
Address/
Data
1^st
cycle
2^nd
3^rd
cycle cycle
4^th cycle
5^th
cycle
6^th
cycle
7^th
cycle
Read Protection
Status
RP
4
Block Temporary
Unprotection
BTU
4
Code Temporary
Unprotection
CTU
1
Code Temporary
Protection
CTP
1
Addr.⁽²⁾
Data
Addr.⁽²⁾
x2A54h
x15A8h
x2A54h
Any odd word
address ⁽⁵⁾
Read Protection Register
until a new write cycle is
xxA8h xx54h xx90h Read PR ^initiated.
x2A54h x15A8h x2A54h
X
Data
Addr.⁽²⁾
Data
Addr.⁽²⁾
Data
xxA8h xx54h xxC1h
xxF0h
MEM ⁽⁷⁾
Write cycles must be executed from Flash.
FFFFh
MEM ⁽⁷⁾
Write cycles must be executed from Flash.
FFFBh
1. Mne = mnemonic, X = Don’t Care.
WA = Write Address: address of memory location to be programmed.
WD = Write Data: 16-bit data to be programmed.
BA = Block address.
2. Address bit A14, A15 and above are don’t care for coded address inputs.
3. Optional, additional blocks addresses must be entered within a timeout delay (96 µs) after last write entry, timeout status
can be verified through FSB.3 value. When full command is entered, read Data Polling or Toggle bit until Erase is
completed or suspended.
4. Read data polling or toggle bit until erase completes.
5. Odd word address = 4n-2 where n = 0, 1, 2, 3..., e.g. 0002h, 0006h, etc.
6. WPR = Write protection register. To protect code, bit 15 of WPR must be ‘0’. To protect block N (N=0,1,...), bit N of WPR
must be ‘0’. Bit that are already at ‘0’ in protection register must also be ‘0’ in WPR, else a writing error will occurs (it is not
possible to write a ‘1’ in a bit already programmed at ‘0’).
7. MEM = any address inside the Flash memory space. Absolute addressing mode must be used (MOV MEM, Rn), and
instruction must be executed from Flash memory space.
Flash commands and ST10 pipeline effect
Due to the ST10F269Zx pipeline effect, all erase and program commands must not be
immediately followed by a JMPx, CALLx or RETx instruction.
For any erase or program command, a NOP instruction must be inserted after sending the
last command to the Flash memory Erase/Program Controller.
When not implemented, and when the ST10F269Zx is in bootstrap mode with the code
running from the XRAM or an external memory, the TestFlash may be selected instead of
the user Flash memory (for details, please refer to ST10F269Zx errata sheet).
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