STM32F051K4U6 Datasheet, PDF(75/104 Page) STMicroelectronics – Low- and medium-density advanced ARM™-based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces

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STM32F051K4U6 Datasheet, PDF (75/104 Pages) STMicroelectronics – Low- and medium-density advanced ARM™-based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces

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Electrical characteristics

STM32F051x

6.3.14

NRST pin characteristics

The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up

resistor, RPU (see Table 50).

Unless otherwise specified, the parameters given in Table 53 are derived from tests

performed under ambient temperature and VDD supply voltage conditions summarized in

Table 20.

Table 53. NRST pin characteristics

Symbol

Parameter

Conditions Min Typ Max Unit

VIL(NRST)(1) NRST Input low level voltage

VIH(NRST)(1) NRST Input high level voltage

â0.3

2

-

0.8

V

- VDD+0.3

Vhys(NRST)

NRST Schmitt trigger voltage

hysteresis

- 200

-

mV

RPU

Weak pull-up equivalent resistor(2)

VF(NRST)(1) NRST Input filtered pulse

VNF(NRST)(1) NRST Input not filtered pulse

VIN = VSS

30 40

-

-

300 -

50

kÎ©

100 ns

-

ns

1. Guaranteed by design, not tested in production.

2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution

. to the series resistance must be minimum (~10% order)

Figure 21. Recommended NRST pin protection

%XTERNAL

RESETCIRCUIT

6$$

.234

205

Â&

)NTERNAL2ESET

&ILTER

-36

1. The reset network protects the device against parasitic resets.

2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 53. Otherwise the reset will not be taken into account by the device.

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