TDA7429L Datasheet, PDF (7/16 Pages) STMicroelectronics – 3 BAND EQUALIZER AUDIO PROCESSOR WITH SUBWOOFER CONTROL

Figure 6. Acknowledge on the I²C bus
TDA7429L
SCL
1
2
3
7
8
9
SDA
START
MSB
D99AU1033
ACKNOWLEDGMENT
FROM RECEIVER
2.0 SOFTWARE SPECIFICATION
2.1 Interface Protocol
The interface protocol comprises:
s A start condition (S)
s A chip address byte, containing the TDA7429L address
s A subaddress bytes
s A sequence of data (N byte + achnowledge)
s A stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB
MSB
S 1 0 0 0 0 0 A 0 ACK B
DATA
D95AU226A
ACK = Acknowledge S = Start
P = Stop
LSB
MSB
ACK
A = Address
DATA
LSB
ACK P
B = Auto Increment
3.0 EXAMPLES
3.1 No Incremental Bus
The TDA7429L receives a start condition, the correct chip address, a subaddress with the MSB = 0 (no incre-
mental bus), N-datas (all these datas concern the subaddress selected), a stop condition.
CHIP ADDRESS
SUBADDRESS
DATA
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 0 0 A 0 ACK 0 X X X D3 D2 D1 D0 ACK
D95AU306
DATA
LSB
ACK P
3.2 Incremental Bus
The TDA7429L receives a start condition, the correct chip address, a subaddress with the MSB = 1 (incremental
bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBADDRESS from
”1XXX1010” to ”1XXX1111” of DATA are ignored.The DATA 1 concern thesubaddress sent, and the DATA 2
concern the subaddress sent plus one in the loop etc, and at the end it receivers the stop condition.
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB
MSB
LSB
MSB
S 1 0 0 0 0 0 A 0 ACK 1 X X X D3 D2 D1 D0 ACK
D95AU307
DATA
LSB
ACK P
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