STV9410 Datasheet, PDF (7/25 Pages) STMicroelectronics – CRT AND LCD SEMI-GRAPHIC DISPLAY PROCESSOR

STV9410
2. FUNCTIONAL DESCRIPTION
STV9410 display processor operation is controlled
by a host microcomputer via a 3-wire serial bus. It
is fully programmable through seven internal
read/write registers and performs all the display
functions either for CRT screen or LCD passive
matrix by generating pixels from data stored in its
internal memory. In addition, the host microcom-
puter can have straightforward accesses to the
on-chip 6 Kbytes RAM, even during the display
operation.
The following functions are integrated in the
STV9410 :
- Crystal oscillator,
- Programmable timing generator,
- Microcomputer 3-wire serial interface,
- ROM character generatorincluding 128 alphanu-
meric and 128 semigraphic character sets,
- 6 Kbytes on chip RAM to store character codes,
user definable character sets, and any host mi-
crocomputer data,
and in CRT mode :
- Y output driven by a 4-bit DAC,
- Programmable master or slave synchro modes,
- R, G, B, I outputs,
in LCD mode :
- LCD interface for passive multiplexed matrix,
- 7 grey levels plus black.
2.1 SERIAL INTERFACE
This 3-wire serial interface can be used with any
microcomputer. Data transfer is supported by hard-
ware peripherals like SPI or UART and can be
emulated with standard I/O port using software
routine ( see application note ).
NCS input enablestransfer on high to low transition
and transfer stays enabled as long as NCS input
remains at logical low level. NCS input disables
transfer as soon as low to high transition occurs,
whatever transfer state is, and transfer remains
disabled as long as NCS input remains at logical
high level.
SCK input receives serial clock; it must be high at
the beginning of the transfer; data is sampled on
rising edge of SCK.
SDA input (in write mode) receives data which must
be stable at least tsds before and at least tsdh after
SCK rising edge. In read mode, SDA receives
address and read command (R/W bit) and then it
switches from input state to output state to send
data (see Data transfer and Application Note).
Data Transfer in Write Mode
The host MCU writes data into STV9410 registers
or memory. The MCU sends first MSB address with
R/W bit clear, it sends secondly LSB address fol-
lowed by data byte(s). STV9410, then, internally
increments received address, ready to store a sec-
ond data byte if needed, and so on, as long as NCS
remains low (see Figure 4). LSB are sent first.
Data Transfer in Read Mode
The host MCU reads data from STV9410 registers
or memory. The MCU sends first MSB address with
R/W bit set, it sends secondly LSB address, then
SDA pin switches from input state to output state
and provides data byte(s) at SCK MCU clock rate.
Notice that a minimum delay is needed before
sending the first SCK rising edge to sample the first
data bit (at least 2µs). After each data byte
STV9410 internally increments address and it
sends next data at SCK frequency. SDA remains in
output state as long as NCS remains low (see
Figure 5).
Address auto-incrementation allows host MCU to
use 8, 16, 32-bit data words to optimize transfer
rate. LSB are sent first. SCK max speed is 4MHz.
7/25