STLC1502 Datasheet, PDF (7/81 Pages) STMicroelectronics – VOICE OVER IP PROCESSOR

Pin
153, 154, 155
Pin Name
esmcs[0..2]n
61
ecs0width
EDM ( specific controls)
156, 158, 159, 160 edmcsn[0..3]
161
edmclken
162
edmoclk
165
edmras
166
edmcas
167
edmwe
MII Interface Port # 1
168
mii1_txen
169
mii1_txclk
170, 171, 174, 175
176
mii1_txd[0..3]
mii1_rxclk
177
mii1_rxdv
178
mii1_rxer
181, 182, 183, 184 mii1_rxd[0..3]
185
mii1_col
186
mii1_crs
MII Interface Port # 2
193
mii2_txclk
194
195, 196, 197, 198
mii2_txen
mii2_txd[0..3]
STLC1502
Pin Description/Note
Chip select [0..2] for external
memory (FLASH/SRAM). At
power up or hardware reset, if
external boot ROM has been
selected, (bootsel =’1’) the signal
is asserted during the fetch
instruction, else the selection
depends on internal address
mapping
External FLASH/SRAM Data bus
size: if settled to ‘L’, select a 8 bit
parallelism data.
Pin
Drive
4mA
Pin
Type
O
I
Chip select for SDRAM or RAS for 8mA
O
EDO DRAM
SDRAM clock enable
8mA
O
SDRAM output clock
8mA
O
SDRAM ras command
8mA
O
SDRAM cas command
8mA
O
SDRAM we command
8mA
O
Transmit enable
4mA
O
Transmit clock reference for txd,
I
txen, txer
Transmit data bus
4mA
O
Receive clock reference for rxd,
I
rxdv, rxer
Receive data valid
I
Receive error signal, indicates an
I
error condition on receiving data
Receive data bus
I
Collision signal
I
Carrier sense indication
I
Transmit clock reference for txd,
I
txen, txer
Transmit enable
4mA
O
Transmit data bus
4mA
O
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