M68AW127B Datasheet, PDF (7/20 Pages) STMicroelectronics – 1Mbit 128K x8, 3.0V Asynchronous SRAM

M68AW127B
Table 4. Capacitance
Symbol
Parameter ^(1,2)
C_IN
Input Capacitance on all pins (except DQ)
C_OUT Output Capacitance
Note: 1. Sampled only, not 100% tested.
2. At TA = 25°C, f = 1MHz, VCC = 3.0V.
Test
Condition
Min
Max
Unit
V_IN = 0V
6
pF
V_OUT = 0V
8
pF
Table 5. DC Characteristics
Symbol
Parameter
Test Condition
Min Typ
Max
Unit
I_CC1 ^(1,2) Supply Current
V_CC = 3.6V, f = 1/t_AVAV,
70
I_OUT = 0mA
100
6.0
15
mA
25
35
mA
Operating Supply Current
V_CC = 3.6V, f = 1MHz,
I_OUT = 0mA
70
2
mA
I_CC2 ⁽³⁾
Operating Supply Current
(READ)
Operating Supply Current
(WRITE)
V_CC = 3.6V, f = 1MHz,
I_OUT = 0mA
100
1.5
5
mA
10
15
mA
I_LI Input Leakage Current
0V ≤ V_IN ≤ V_CC
–1
1
µA
I_LO ⁽⁴⁾ Output Leakage Current
0V ≤ V_OUT ≤ V_CC
–1
1
µA
I_SB
Standby Supply Current
CMOS
V_CC = 3.6V, E1 ≥ V_CC – 0.2V, ⁷⁰
E2 ≤ 0.2V, f = 0
100
2.5
15
µA
0.3
10
µA
V_IH Input High Voltage
2.2
V_CC + 0.3 V
V_IL Input Low Voltage
70 –0.3
100 –0.3
0.8
V
0.6
V
I_OH = –1mA
70 2.4
V
V_OH Output High Voltage
100 2.2
V
V_OL Output Low Voltage
I_OL = 2.1mA
0.4
V
Note: 1. Average AC current, cycling at tAVAV minimum.
2. E1 = V_IL, E2 = V_IH, V_IN = V_IH or V_IL.
3. E1 ≤ 0.2V or E2 ≥ VCC –0.2V, VIN ≤ 0.2V or VIN ≥ VCC –0.2V.
4. Output disabled.
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