HDMIULC6-4SC6 Datasheet, PDF (7/11 Pages) STMicroelectronics – Ultra large bandwidth ESD protection

HDMIULC6-4SC6
Technical information
It’s the reason why some recommendations have to be followed (see Section 3.3: How to
ensure good ESD protection).
Figure 9. ESD behavior: parasitic phenomena due to unsuitable layout
ESD surge
on data line
L_I/O
L_I/O
di
dt
L_VBUS
V_F
I/O pin
L_GND
Vcc pin
V_BUS
Data line
L_I/O
di
dt
+ L_GND
di
dt
V_TRANSIL
V_CL
V_TRANSIL +V_F
GND pin
L_GND
di
dt
-V_F
V_CL+
tr=1ns
tr=1ns
V_CL+
=
V_TRANSIL
+
V_F
+ L_I/O
di
dt
+ L_GND
di
dt
V_CL-
= - V_F -
di
L_{I/O dt}
-
di
L_{GND dt}
surge > 0
surge < 0
-
L_I/O
di
dt
-
L_GND
di
dt
V_TRANSIL = V_BR + Rd.Ip
V_CL-
POSITIVE
SURGE
t
t
NEGATIVE
SURGE
3.3
How to ensure good ESD protection
While the HDMIULC6-4SC6 provides a high immunity to ESD surge, an efficient protection
depends on the layout of the board. In the same way, with the rail to rail topology, the track
from data lines to I/O pins, from V_CC to V_BUS pin, and from GND plane to GND pin must be
as short as possible to avoid over voltages due to parasitic phenomena (see Figure 9 and
Figure 10 for layout considerations).
Figure 10. ESD behavior: layout
optimization
Figure 11. ESD behavior: measurement
conditions
Unsuitable layout
ESD SURGE
TEST BOARD
IN
OUT
HDMIULC6- 4SC6
Vbus
Optimized layout
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