AN2761 Datasheet, PDF (7/36 Pages) STMicroelectronics – Solution for designing a transition mode

AN2761
3
Designing a TM PFC
Designing a TM PFC
3.1
Input specification
The following is a possible design flowchart in reference to a transition mode PFC, using the
L6562A. This first part is a detailed specification of the operating conditions of the circuit that
is needed for the following calculation. In this example a 80 W, wide input range mains PFC
circuit has been considered. Some design criteria are also given.
● Mains voltage range (Vac rms):
VAC_min = 85Vac
(1)
VAC_max = 265Vac
● Minimum mains frequency:
f_l = 47 Hz
(2)
● Rated output power (W):
P_out = 80 W
(3)
Because the PFC is a boost topology the regulated output voltage depends strongly on the
maximum AC input voltage. In fact, for boost correct operation the output voltage must
always be higher than the input and thus, because the Vin max is ^VACmax ^{⋅ 2= 374} V_pk,
the output has been set at 400 Vdc as the typical value. If the input voltage is higher, as
typical in ballast applications, the output voltage must be set higher accordingly. As a rule of
thumb the output voltage must be set 6/7% higher than the maximum input voltage peak.
● Regulated DC output voltage (Vdc):
V_out = 400 V
(4)
The target efficiency and PF are set here at minimum input voltage and maximum load.
They are used for the following operating condition calculations of the PFC. Of course at
high input voltage the efficiency is higher.
● Expected efficiency (%):
η = ^Pout = 93%
(5)
P_in
● Expected power factor:
PF = 0.99
(6)
Doc ID 14690 Rev 2
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