74LCX86 Datasheet, PDF (7/15 Pages) Fairchild Semiconductor – Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs

74LCX86
Electrical characteristics
Table 7.
Test condition
Value
Symbol
Parameter
V_CC
C_L
R_L
t_s = t_r ^{-40 to 85 °C Unit}
(V)
(pF)
(Ω)
(ns)
Min Max
t_PLH t_PHL
Propagation
Delay Time
2.7
6.0
50
500
2.5
ns
3.0 to 3.6
1.0 6.5
t_OSLH
t_OSHL
Output To Output
Skew Time ^{(1) (2)}
3.0 to 3.6
50
500
2.5
1.0 ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (t_OSLH = | t_PLHm - t_PLHn|,
t_OSHL = | t_PHLm - t_PHLn|)
2. Parameter guaranteed by design
Table 8. Capacitive characteristics
Test condition
Symbol
Parameter
V_CC
(V)
C_IN Input capacitance
C_PD
Power dissipation
capacitance ⁽¹⁾
3.3
V_IN = 0 to V_CC
3.3
f_IN = 10MHz
V_IN = 0 or V_CC
Value
T_A = 25 °C
Unit
Min Typ Max
6
pF
43
pF
1. C_PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Test Circuit). Average operating current can be
obtained by the following equation. I_CC(opr) = C_PD x V_CC x f_IN + I_CC/4 (per gate)
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