STM32F051K8U6 Datasheet, PDF (69/104 Pages) STMicroelectronics – Low- and medium-density advanced ARM™-based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces

Electrical characteristics
STM32F051x
Table 50. I/O static characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V_SS ≤ V_IN ≤ V_DD
I/O TC, FT and FTf
-
-
±0.1
V_SS ≤ V_IN ≤ V_DD
2 V≤ V_DD ≤ V_DDA ≤ 3.6 V
-
I/O TTa used in digital
mode
-
±0.1
V_IN= 5 V
I/O FT and FTf
-
I_lkg Input leakage current ⁽³⁾
V_IN= 3.6 V,
2 V≤ V_DD ≤ V_IN
V_{DDA =} 3.6 V
-
I/O TTa used in digital
mode
-
10
µA
-
1
V_SS ≤ V_IN ≤ V_DDA
2 V≤ V_DD ≤ V_DDA ≤ 3.6 V
-
I/O TTa used in analog
mode
-
±0.2
R_PU
Weak pull-up equivalent
resistor⁽⁴⁾
V_IN = V_SS
30
40
50
kΩ
R_PD
Weak pull-down
equivalent resistor⁽⁴⁾
V_IN = V_DD
30
40
50
kΩ
C_IO I/O pin capacitance
-
5
-
pF
1. To sustain a voltage higher than V_DD+0.3 the internal pull-up/pull-down resistors must be disabled.
2. Hysteresis voltage between Schmitt trigger switching levels. Data based on characterization, not tested in production.
3. Leakage could be higher than max. if negative current is injected on adjacent pins.
4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
MOS/NMOS contribution to the series resistance is minimum (~10% order).
All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in Figure 16 and Figure 17 for standard I/Os, and
in Figure 18 and Figure 19 for 5 V tolerant I/Os.
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Doc ID 022265 Rev 3