ST7L05 Datasheet, PDF (65/104 Pages) STMicroelectronics – 8-bit MCU for automotive with single voltage Flash memory, data EEPROM, ADC, timers, SPI

ST7L05, ST7L09
8-BIT A/D CONVERTER (ADC) (Cont’d)
11.4.6 Register Description
CONTROL/STATUS REGISTER (ADCCSR)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
EOC SPEED ADON 0
0 CH2 CH1 CH0
Bit 7 = EOC Conversion Complete
This bit is set by hardware. It is cleared by soft-
ware reading the result in the DR register or writing
to the CSR register.
0: Conversion is not complete
1: Conversion can be read from the DR register
Bit 6 = SPEED ADC clock selection
This bit is set and cleared by software. It is used
together with the SLOW bit to configure the ADC
clock speed. Refer to the table in the SLOW bit de-
scription.
Bit 5 = ADON A/D Converter On
This bit is set and cleared by software.
0: A/D converter is switched off
1: A/D converter is switched on
Bit 4:3 = Reserved. must always be cleared.
Bits 2:0 = CH[2:0] Channel Selection
These bits are set and cleared by software. They
select the analog input to convert.
Channel Pin¹⁾
AIN0
AIN1
AIN2
AIN3
AIN4
CH2
0
0
0
0
1
CH1
0
0
1
1
0
CH0
0
1
0
1
0
Notes:
1. The number of pins AND the channel selection varies
according to the device. Refer to the device pinout.
2. A write to the ADCCSR register (with ADON set) aborts
the current conversion, resets the EOC bit and starts a
new conversion.
DATA REGISTER (ADCDR)
Read Only
Reset Value: 0000 0000 (00h)
7
0
D7 D6 D5 D4 D3 D2 D1 D0
Bits 7:0 = D[7:0] Analog Converted Value
This register contains the converted analog value
in the range 00h to FFh.
Note: Reading this register resets the EOC flag.
CONTROL/STATUS REGISTER 2 (ADCCSR2)
Read/Write
Reset Value: 0000 0000 (00h)
7
0
0
0
0
0 SLOW 0
0
0
Bit 7:4 = Reserved. Forced by hardware to 0.
Bit 3 = SLOW Slow mode
This bit is set and cleared by software. It is used
together with the SPEED bit to configure the ADC
clock speed as shown on the table below.
f_ADC
f_CPU/2
f_CPU
f_CPU/4
SLOW SPEED
0
0
0
1
1
x
Bit 2:0 = Reserved. Forced by hardware to 0.
Note: If ADC settings are changed by writing the
ADCCSR2 register while the ADC is running, a
dummy conversion is needed before obtaining re-
sults with the new settings.
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