STV8247_06 Datasheet, PDF (63/156 Pages) STMicroelectronics – Digital Audio Decoder/Processor for A2 and NICAM Television/Video Recorders

STV82x7
I2S_CTRL
Address: 04h
Type: R/W
Bit 7
SYNC_OFF
Bit 6
SYNC_SIGN
Bit 5
0
Register List
I²S Synchronization Control Register
Bit 4
Bit 3
LOCK_TH[1:0]
Bit 2
LOCK_MODE
Bit 1
Bit 0
SYNC_CST[1:0]
Bit Name Reset
SYNC_OFF 0
SYNC_SIGN 0
Bit 5
0
LOCK_TH[
1:0]
00
LOCK_MOD
E
0
SYNC_CST[
1:0]
01
Function
Open the loop of synchronization - External PCM clock is used internally and must be equal to
512 x f_SOUT
Sign of the loop reversion (to be used in case of gain inversion of the Frequency Synthesizer)
Reserved
Lock Detector Threshold Programming
00: ±1 CLK period error of accumulation
01: ±2 CLK period error of accumulation
10: ±4 CLK period error of accumulation
11: ±8 CLK period error of accumulation
Lock Detector Mode
0: Lock when accumulation error within lock threshold and LR detected (period counter not
saturated)
1: Lock when only accumulation error within lock threshold. Don’t care about the LR detection
Synchronization Time Constant
Defines the measurement period of LR
00: Half period measured (lowest accuracy)
01: One full period measured
10: Two full periods measured
11: Four full periods measured (highest accuracy)
I2S_STAT
I²S Synchronization Status Register
Address: 05h
Type: R/W
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
LR_OFF
Bit 0
LOCK_FLAG
Bit Name
Bits[7:2]
LR_OFF
LOCK_FLAG
Reset
Function
0 Reserved.
0 LR Signal Detection
0: LR signal detected and correct
1: Missing LR pulses detected
0 Lock Flag allowing unmute of Audio Output
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