TDA8133_03 Datasheet, PDF (6/13 Pages) STMicroelectronics – +5.1 V AND +8 V DUAL-VOLTAGE REGULATOR WITH DISABLE AND RESET FUNCTIONS

CIRCUIT DESCRIPTION
3 CIRCUIT DESCRIPTION
TDA8133/D
The TDA8133 and the TDA8133D are dual-voltage regulators with Reset and Disable functions.
The two regulation parts are supplied from a single voltage reference circuit trimmed by zener
zapping during EWS testing. Since the supply voltage of this voltage reference is connected to pin
INPUT1 (V_IN1), the second regulator will not work if pin INPUT1 is not supplied.
The output stages are designed using a Darlington configuration with a typical dropout voltage of
1.2 V.
The Disable circuit will switch off pin OUTPUT2 if a voltage less than 0.8 V is applied to pin
DISABLE.
The Reset circuit checks the voltage at pin OUTPUT1. If this voltage drops below V_O1 - 0.25 V
(4.85 V Typ.), the "a" comparator (Figure 3) rapidly discharges the external capacitor (Ce) and the
reset output immediately switches to low. When the voltage at pin OUTPUT1 exceeds V_O1 - 0.2 V
(4.9 V Typ.), the V_Ce voltage increases linearly to the reference voltage (V_REF = 2.5 V)
corresponding to a Reset Pulse Delay (t_RD) as shown in Figure 4.
t_RD = -^C----^e-₁---^×-₀---_µ-²---_A.--⁵----^V--
Afterwards, the reset output returns to high. To avoid glitches in the reset output, the second
comparator "b" has a large hysteresis (1.9 V).
Figure 3: Reset Diagram
OUTPUT1
V_REF
+a
- ⁵⁰
REG
V_REF = 2.5 V
10 µA
3
Ce
-b
+
V_{REF 0.6V}
RESET
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