TDA7575 Datasheet, PDF (6/17 Pages) STMicroelectronics – MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER WITH INTEGRATED DIGITAL DIAGNOSTICS

TDA7575
ELECTRICAL CHARACTERISTCS: (continued)
Symbol
Parameter
Test Condition
V_O Offset Detection
Power Amplifier in play condition
AC Input signals = 0
I²C BUS INTERFACE
f_SCL Clock Frequency
V_IL Input Low Voltage
V_IH Input High Voltage
Min. Typ. Max. Unit
±1.5 ±2
±2.5
V
400 KHz
1.5
V
2.3
V
I²C BUS INTERFACE
Data transmission from microprocessor to the TDA7575 and viceversa takes place through the 2 wires I²C BUS inter-
face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
* Transmitter
= master (µP) when it writes an address to the TDA7575
= slave (TDA7575) when the µP reads a data byte from TDA7575
** Receiver
= slave (TDA7575) when the µP writes an address to the TDA7575
= master (mP) when it reads a data byte from TDA7575
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