TDA7467 Datasheet, PDF (6/11 Pages) STMicroelectronics – AUDIO MATRIX WITH SRS EFFECTS

TDA7467
SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
A start condition (S)
A chip address byte
A subaddress bytes
A sequence of data (N byte + achnowledge)
A stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB MSB
S 1 0 0 0 0 0 A 0 ACK B
ACK = Achnowledge
S = Start
P = Stop
B = Auto Increment
DATA
LSB MSB
ACK
DATA
LSB
ACK P
EXAMPLES
No Incremental Bus
The TDA7467 receives a start condition, the correct chip address, a subaddress with the MSB = 0 (no in-
cremental bus), N-data (all these data concern the subaddress selected), a stop condition.
CHIP ADDRESS
SUBADDRESS
DATA
MSB
LSB MSB
LSB MSB
S 1 0 0 0 0 0 A 0 ACK 0 X X X X X D1 D0 ACK
DATA
LSB
ACK P
Incremental Bus
The TDA7467 receives a start condition, the correct chip address, a subaddress with the MSB = 1 (incre-
mental bus): now it is in a loop condition with an autoincrease of the subaddress whereas SUBAD-
DRESS from ”1XXXX1XX” to ”1XXX1111” of DATA are ignored.
The DATA 1 concerns the subaddress sent, and the DATA 2 concerns the subaddress plus one sent in
the loop etc. and at the end, it receives the stop condition.
CHIP ADDRESS
SUBADDRESS
DATA 1 to DATA n
MSB
LSB MSB
LSB MSB
S 1 0 0 0 0 0 A 0 ACK 1 X X X X X D1 D0 ACK
DATA
LSB
ACK P
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