TDA7437N Datasheet, PDF (6/23 Pages) STMicroelectronics – DIGITALLY CONTROLLED AUDIO PROCESSOR

TDA7437N
ELECTRICAL CHARACTERISTICS (continued)
(AV_DD, DV_DD = 9V; R_L = 10KΩ; R_g = 50Ω; T_amb = 25°C; all gains = 0dB; f = 1KHz. Refer to the test circuit,
unless otherwise specified.)
Symbol
Parameter
Test Condition
Min.
GENERAL
V_CC Supply Voltage
6
I_CC Supply Current
7
PSRR Power Supply Rejection Ratio
f = 1KHz
70
e_NO Output Noise
Output Muted (B = 20 to 20kHz flat)
All Gains 0dB(B = 200 to 20kHz flat)
E_t Total Tracking Error
A_V = 0 to -20dB
A_V = -20 to -60dB
S/N Signal to Noise Ratio
All Gains = 0dB; V_O = 2.1Vrms
S_C Channel Separation L - R
80
d
Distortion
V_IN =1V all gain = 0dB
BUS INPUTS
V_IL Input Low Voltage
V_lN Input High Voltage
3
I_lN Input Current
V_IN = 0.4V
-5
V_O Output Voltage SDA
Acknowledge
I_O = 1.6mA
Note 1: WIN represents the MUTE programming bit pair D6, D5 for the zero crossing window threshold
Note 2: Internall pullup resistor to Vs/2; "LOW" = softmute active
Typ.
9
10
90
4
6
0
0
111
95
0.01
0.1
Max.
10.2
13
15
1
2
0.08
1
5
0.4
Unit
V
mA
dB
µV
µV
dB
dB
dB
dB
%
V
V
µA
V
Note: The ANGND and DIGGND layout wires must be kept separated. A 50Ω resistor is recommended to be put as far as possible from the
device.
The CLD - and CDR - can be shortcircuited in applications providing 3 wires CD signal
L+
L- =∼R-
CD
R+
L+
L-
TDA7437N
R-
R+
D02AU1384
CLD - = DIFFINLGND
CDR - = DIFFINRGND
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