M40SZ100Y_10 Datasheet, PDF (6/24 Pages) STMicroelectronics – 5 V or 3 V NVRAM supervisor for LPSRAM

Description
M40SZ100Y, M40SZ100W
Table 1.
Signal names
E
Chip enable input
E_CON
RST
Conditioned chip enable output
Reset output (open drain)
RSTIN
Reset input
BL
Battery low output (open drain)
V_OUT
V_CC
V_BAT ⁽¹⁾
PFI
Supply voltage output
Supply voltage
Backup supply voltage
Power fail input
PFO
Power fail output
V_SS
Ground
NC
Not connected internally
1. For SO16 only.
Figure 2. SOIC16 connections
NC
NC
RST
NC
RSTIN
PFO
VBAT
VSS
1
16
2
15
3
14
4 _M40SZ100Y 13
5 M40SZ100W 12
6
11
7
10
8
9
VCC
NC
VOUT
NC
PFI
BL
E
ECON
AI03935
6/24
Doc ID 7528 Rev 3