AN2344 Datasheet, PDF(6/27 Page) STMicroelectronics – Power MOSFET avalanche characteristics and ratings

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

AN2344 Datasheet, PDF (6/27 Pages) STMicroelectronics – Power MOSFET avalanche characteristics and ratings

◁

MOSFET fundamentals

AN2344

1.1

Failure modes descriptions

The integral diode of a MOSFET is the collector-base junction of the parasitic transistor. If

the current flows laterally through region P, the increase in the voltage drop across the

emitter base resistance causes the BJT to turn ON.

The initial avalanche current is concentrated mainly in the diode localized in the deep zone

of P+; as soon as the current grows, it begins to interest the more lightly doped P regions.

Since, by design, the lateral resistance RP value is higher than that of the heavy doped P+

region vertical resistance, and the current is concentrated in the region P+, the BJT should

not turn ON.

As soon as the current begins to stimulate the P region, causing a sufficient drop of voltage

to equal the BJT base-emitter voltage (VBE), the base current (IB), in conjunction with the

transistor Î² will cause the BJT to turn ON. The VBE has a negative temperature coefficient,

consequently leading to thermal runaway and finally, the destruction of the device due to the

secondary breakdown of the parasitic BJT. The adoption of a heavily doped P+ region,

thereby determining the reduction of the transistor gain and base resistance has been the

first step for MOSFET improvement, followed by other, more subtle optimizations.

The power that is dissipated in the MOSFET causes an increase in junction temperature. If

the temperature increases to a critical value set by the siliconfs property, the failure, without

the contribution of the parasitic bipolar, occurs because of the creation of thermally

generated carriers in the epitaxial/bulk region, which in turn, create the hot spots. The

critical temperature to have phenomenon is beyond the maximum junction temperature of

the devices, and is related to the intrinsic temperature of doped silicon, to which the

concentration of the bulk is equal to that of the thermally generated carriers.

The temperature increase that occurs during avalanche phenomena, due to the silicon

thermal capacitance, is not instantaneous. Therefore, this type of failure should be

distinguished from that caused by current as the device holds the breakdown voltage for a

finite time before its destruction.

6/27

▷