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STM32F101C4T6A Datasheet, PDF (58/79 Pages) STMicroelectronics – Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces
Electrical characteristics
STM32F101x4, STM32F101x6
5.3.15
5.3.16
TIM timer characteristics
The parameters given in Table 38 are guaranteed by design.
Refer to Section 5.3.12: I/O current injection characteristics for details on the input/output
alternate function characteristics (output compare, input capture, external clock, PWM
output).
Table 38. TIMx(1) characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
tres(TIM) Timer resolution time
fTIMxCLK = 36 MHz
1
27.8
fEXT
Timer external clock
frequency on CH1 to CH4 fTIMxCLK = 36 MHz
0
0
fTIMxCLK/2
18
ResTIM Timer resolution
16
16-bit counter clock period
tCOUNTER when internal clock is
selected
1
fTIMxCLK = 36 MHz 0.0278
65536
1820
tMAX_COUNT Maximum possible count
fTIMxCLK = 36 MHz
65536 × 65536
119.2
1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers.
tTIMxCLK
ns
MHz
MHz
bit
tTIMxCLK
µs
tTIMxCLK
s
Communications interfaces
I2C interface characteristics
Unless otherwise specified, the parameters given in Table 39 are derived from tests
performed under the ambient temperature, fPCLK1 frequency and VDD supply voltage
conditions summarized in Table 8.
The STM32F101xx Low-density access line I2C interface meets the requirements of the
standard I2C communication protocol with the following restrictions: the I/O pins SDA and
SCL are mapped to are not “true” open-drain. When configured as open-drain, the PMOS
connected between the I/O pin and VDD is disabled, but is still present.
The I2C characteristics are described in Table 39. Refer also to Section 5.3.12: I/O current
injection characteristics for more details on the input/output alternate function characteristics
(SDA and SCL).
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Doc ID 15058 Rev 5