ST62T52C_02 Datasheet, PDF (55/78 Pages) STMicroelectronics – 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, SAFE RESET, AUTO-RELOAD TIMER AND EEPROM

ST62T52C ST62T62C/E62C
INSTRUCTION SET (Cont’d)
Conditional Branch. The branch instructions
achieve a branch in the program when the select-
ed condition is met.
Control Instructions. The control instructions
control the MCU operations during program exe-
cution.
Bit Manipulation Instructions. These instruc-
tions can handle any bit in data space memory.
One group either sets or clears. The other group
(see Conditional Branch) performs the bit test
branch operations.
Jump and Call. These two instructions are used
to perform long (12-bit) jumps or subroutines call
inside the whole program space.
Table 18. Conditional Branch Instructions
Instruction
Branch If
Bytes
JRC e
C=1
1
JRNC e
C=0
1
JRZ e
Z=1
1
JRNZ e
Z=0
1
JRR b, rr, ee
Bit = 0
3
JRS b, rr, ee
Bit = 1
3
Notes:
b. 3-bit address
e. 5 bit signed displacement in the range -15 to +16<F128M>
ee. 8 bit signed displacement in the range -126 to +129
Cycles
2
2
2
2
5
5
Flags
Z
C
*
*
*
*
*
*
*
*
*
∆
*
∆
rr. Data space register
∆ . Affected. The tested bit is shifted into carry.
* . Not Affected
Table 19. Bit Manipulation Instructions
Instruction
SET b,rr
RES b,rr
Addressing Mode
Bit Direct
Bit Direct
Bytes
2
2
Cycles
4
4
Flags
Z
C
*
*
*
*
Notes:
b. 3-bit address;
rr. Data space register;
* . Not<M> Affected
Table 20. Control Instructions
Instruction
NOP
RET
RETI
STOP (1)
WAIT
Addressing Mode
Inherent
Inherent
Inherent
Inherent
Inherent
Bytes
1
1
1
1
1
Cycles
2
2
2
2
2
Flags
Z
C
*
*
*
*
∆
∆
*
*
*
*
Notes:
1. This instruction is deactivated<N>and a WAIT is automatically executed instead of a STOP if the watchdog function is selected.
∆ . Affected
*. Not Affected
Table 21. Jump & Call Instructions
Instruction
CALL abc
JP abc
Addressing Mode
Extended
Extended
Bytes
2
2
Cycles
4
4
Flags
Z
C
*
*
*
*
Notes:
abc. 12-bit address;
* . Not Affected
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