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STM32F105XX Datasheet, PDF (54/95 Pages) STMicroelectronics – Connectivity line, ARM-based 32-bit MCU with 64/256 KB Flash, USB OTG, Ethernet, 10 timers, 2 CANs, 2 ADCs, 14 communication interfaces
Electrical characteristics
STM32F105xx, STM32F107xx
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink
+20 mA (with a relaxed VOL).
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in Section 5.2:
G The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run
consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating
IVDD (see Table 7).
G The sum of the currents sunk by all the I/Os on VSS plus the maximum Run
consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating
IVSS (see Table 7).
Output voltage levels
Unless otherwise specified, the parameters given in Table 36 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 9. All I/Os are CMOS and TTL compliant.
Table 36. Output voltage characteristics
Symbol
Parameter
Conditions
Min
Max Unit
VOL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
TTL port
0.4
VOH(2)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
IIO = +8 mA
2.7 V < VDD < 3.6 V VDD–0.4
V
VOL (1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
CMOS port
IIO =+ 8mA
VOH (2)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < VDD < 3.6 V
2.4
0.4
V
VOL(1)(3)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
IIO = +20 mA
1.3
V
VOH(2)(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < VDD < 3.6 V VDD–1.3
VOL(1)(3)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
IIO = +6 mA
0.4
V
VOH(2)(3)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2 V < VDD < 2.7 V VDD–0.4
1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 7
and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
2. The IIO current sourced by the device must always respect the absolute maximum rating specified in
Table 7 and the sum of IIO (I/O ports and control pins) must not exceed IVDD.
3. Based on characterization data, not tested in production.
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Doc ID 15274 Rev 4