ST72321 Datasheet, PDF (54/185 Pages) STMicroelectronics – 8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE

ST72321
WATCHDOG TIMER (Cont’d)
Figure 34. Exact Timeout Duration (t_min and t_max)
WHERE:
t_min0 = (LSB + 128) x 64 x t_OSC2
t_max0 = 16384 x t_OSC2
t_OSC2 = 125ns if f_OSC2=8 MHz
CNT = Value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits
in the MCCSR register
TB1 Bit
TB0 Bit
(MCCSR Reg.) (MCCSR Reg.)
0
0
0
1
1
0
1
1
Selected MCCSR
Timebase
2ms
4ms
10ms
25ms
MSB
4
8
20
49
LSB
59
53
35
54
To calculate the minimum Watchdog Timeout (t_min):
IF CNT <
M------S----B---
4
THEN tm _in = tmin0 + 16384 × CNT × tosc2
ELSE
tmin = tmin0 +
16384
×


C
N
T
–
4----C-----N-----T--
MSB


+
( 192
+
L S B)
×
64
×
4----C-----N-----T--
MSB
× tosc2
To calculate the maximum Watchdog Timeout (t_max):
IF CNT ≤
M------S----B---
4
THEN tma _x = tmax0 + 16384 × C NT × tosc2
ELSE
tmax = tmax0 +
16384 × _C NT –
4----C-----N-----T--
MSB


+
(192
+
LSB)
×
64
×
4----C-----N-----T--
MSB
× tosc2
Note: In the above formulae, division results must be rounded down to the next integer value.
Example:
With 2ms timeout selected in MCCSR register
Value of T[5:0] Bits in
WDGCR Register (Hex.)
00
3F
Min. Watchdog
Timeout (ms)
t_min
1.496
128
Max. Watchdog
Timeout (ms)
t_max
2.048
128.552
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