ST7LITE3 Datasheet, PDF (52/167 Pages) STMicroelectronics – 8-BIT MCU WITH SINGLE VOLTAGE FLASH, DATA EEPROM, ADC, TIMERS, SPI, LINSCI

ST7LITE3
WATCHDOG TIMER (Cont’d)
11.1.5 Interrupts
None.
11.1.6 Register Description
CONTROL REGISTER (CR)
Read / Write
Reset Value: 0111 1111 (7F h)
7
0
WDGA T6 T5 T4 T3 T2 T1 T0
Bit 6:0 = T[6:0] 7-bit timer (MSB to LSB).
These bits contain the decremented value. A reset
is produced when it rolls over from 40h to 3Fh (T6
becomes cleared).
Bit 7 = WDGA Activation bit.
This bit is set by software and only cleared by
hardware after a reset. When WDGA = 1, the
watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
Note: This bit is not used if the hardware watch-
dog option is enabled by option byte.
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