STV2050A Datasheet, PDF (50/83 Pages) STMicroelectronics – AUTOMATIC MULTISCAN DIGITAL CONVERGENCE PROCESSOR

STV2050A - CONVERGENCE
The insertion type is selected using the GOS bit in the D4 register.
GOS
0: Field offset canceller
1: Gain compensation
The direction is selected by the HVM bit in the D4 register.
HVM
0 = Vertical
1 = Horizontal
9.7.3 Gain Cursor Mode
See Figure 27 "Gain Cursors" on page 51.
This mode is normally used in conjunction with the corresponding video pattern. (Refer to Sec-
tion 7.5 "GAIN ADJUSTMENT LINES" on page 38).
The STV2050A can generate a special convergence signal (cursor) controlled by the GCD bit
in the E3 register.
GCD
0 = Cursor Off
1 = Cursor On
The cursor action is selected by the DHV bit in the E3 register.
DHV
0 = Horizontal Cursor
1 = Vertical Cursor
During the gain measuring lines:
– The dynamic values are replaced for each channel by the CRH[7:0] and CRV[7:0] bits for
red, CGH[7:0] and CGV[7:0] bits for green and CBH[7:0] and CBV[7:0] for blue in the DC and
DD registers for horizontal and vertical values, respectively.
– The polarity of these latter values may be changed using the PMH and PMV bits in the D5
register for horizontal and vertical values, respectively.
– The gain value is stored in the E0 register for the coarse value, but the fine values are stored
in the MVR[7:0] bits for red, MVG[7:0] bits for green and MVB[7:0] bits for blue in the E8 reg-
ister.
In vertical cursor mode, the resulting values applied to the DACs are first positive, then in-
verted on the following TV line. In horizontal mode, the values are inverted at each TV line.
9.7.4 Field Offset Cursor Mode
See Figure 27 "Gain Cursors" on page 51.
This mode is normally used in conjunction with the corresponding video pattern. (Refer to Sec-
tion 7.5 "GAIN ADJUSTMENT LINES" on page 38.)
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