STD6N90K5 Datasheet, PDF (5/16 Pages) STMicroelectronics – Ultra-low gate charge

STD6N90K5
Symbol
Parameter
td(on)
tr
td(off)
Turn-on delay time
Rise time
Turn-off delay time
tf
Fall time
Table 7: Switching times
Electrical characteristics
Test conditions
Min. Typ. Max. Unit
VDD= 450 V, ID = 3 A,
RG = 4.7 Ω
VGS = 10 V
(see Figure 14: "Test circuit
for resistive load switching
times" and Figure 19:
"Switching time waveform")
- 12.4 -
ns
- 12.2 -
ns
- 30.4 -
ns
- 15.5 -
ns
Symbol
Parameter
Table 8: Source-drain diode
Test conditions
ISD Source-drain current
ISDM⁽¹⁾
Source-drain current
(pulsed)
VSD⁽²⁾ Forward on voltage
ISD = 6 A, VGS = 0 V
trr
Reverse recovery time
Qrr Reverrse recovery charge
IRRM Reverse recovery current
ISD = 6 A, di/dt = 100
A/µs,VDD = 60 V
(see Figure 16: "Test circuit
for inductive load switching
and diode recovery times")
trr
Reverse recovery time
Qrr Reverse recovery charge
IRRM Reverse recovery current
ISD = 6 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 16: "Test circuit
for inductive load switching
and diode recovery times")
Notes:
(1)_{Pulse width limited by safe operating area}
(2)_{Pulsed: pulse duration = 300 µs, duty cycle 1.5%}
Min. Typ. Max. Unit
-
6
A
-
24 A
-
1.5 V
- 342
ns
- 3.13
µC
- 18.3
A
- 536
ns
- 4.42
µC
- 16.5
A
Symbol
V(BR)GSO
Table 9: Gate-source Zener diode
Parameter
Test conditions
Gate-source breakdown voltage IGS = ± 1 mA,ID = 0 A
Min. Typ. Max. Unit
30
-
-
V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.
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