ST5088 Datasheet, PDF (5/33 Pages) STMicroelectronics – PROGRAMMABLE AUDIO FRONT END FOR DIGITAL PHONES AND ISDN TERMINALS

PIN FUNCTIONS (continued)
SO
PLCC
8
8,9
9
10
Name
GND
MS
10
11
D_X
11
12
AT
14
15
D_R
15
16
16
17
FS
MCLK
17
18
18
–
21
22
22
23
23
24
24
21
25
25
26
26
27
27
28
28
LO
N. C.
MIC2+
MIC1+
MIC1-
TRO
V_CCA
MIC2-
GNDA
EAIN
ST5088
Description
Ground: All digital signals are referenced to this pin.
Mode Select: This input selects COMBO I/II interface mode
with separate MICROWIRE Control interface when tied high
and GCI mode when tied low.
Transmit Data ouput: Data is shifted out on this pin during the
assigned transmit time slots. Elsewhere DX output is in the
high impendance state. In COMBO I/II mode, voice data byte
is shifted out from TRISTATE output D_X at the MCLK
frequency on the rising edge of MCLK. In GCI mode, voice
data byte and control bytes are shifted out from OPEN-DRAIN
output D_X at half the MCLK. An external pull up resistor is
needed.
Alternate Tone: Ring frequency out is controlled without µP
intervention. Tri-state logic controls: f1 (Vcc), f2 (GND), pause
(High Impedance).
Receive data input: Data is shifted in during the assigned
Received time slots. In the COMBO I/II mode, voice data byte
is shifted in at the MCLK frequency on the falling edges of
MCLK. In the GCI mode, PCM data byte and contol byte are
shifted in at half the MCLK frequency on the receive rising
edges of MCLK. There is one period delay between transmit
rising edge and receive rising edge of MCLK.
Frame Sync input: This signal is a 8kHz clock which defines
the start of the transmit and receive frames. Either of three
formats may be used for this signal: non delayed timing mode,
delayed timing and GCI compatible timing mode.
Master Clock Input: This signal is used by the switched
capacitor filters and the encoder/decoder sequencing logic.
Values must be 512 kHz, 1.536 MHz, 2.048 MHz or 2.56 MHz
selected by means of Control Register CRO. MCLK is used
also to shift-in and out data. In GCI mode, 2.56 MHz and 512
kHz are not allowed.
Open drain output:
a logic 1 written into DO (CR1) appears at LO pin as a logic 0
a logic 0 written into DO puts LO pin in high impedance.
No connected.
Alternative positive high impedance input to transmit pre-
amplifier.
Positive high impedance input to transmit pre-amplifier for
microphone symetrical connection.
Negative high impedance input to transmit pre-amplifier for
microphone symetrical connection.
Tape Recorder Output: This pin provides the analog
combination of Tx voice signal and Rx voice signal.
Positive power supply input for the analog section.
+5 V + 10%. V_CC and V_CCA must be directly connected
together.
Alternative negative high impedance input to transmit pre-
amplifier.
Analog Ground: All analog signals are referenced to this pin.
GND and GNDA must be connected together close to the
device.
External Auxiliary input: This input can be used to provide
alternate signals to the Loudspeaker in place of Internal Ring
generator. Input signal should be voice band limited.
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