74LCX74 Datasheet, PDF (5/11 Pages) Fairchild Semiconductor – Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

74LCX74
AC ELECTRICAL CHARACTERISTICS
Test Conditi on
Value
Symbol
Parameter
V_CC
C_L R_L t_s = t_r ^{-40 to 85 °C}
-55 to 125 °C Unit
(V)
(pF) (Ω) (ns) _{Min. Max. Min. Max.}
t_PLH t_PHL Propagation Delay
2.7
Time (CK to Q or Q) _{3.0 to 3.6}
50
500 2.5
1.5
1.5
8.0
7.0
1.5
1.5
9.2
8.0
ns
t_PLH t_PHL Propagation Delay
2.7
1.5
8.0
1.5
9.2
Time (PR or CLR to
50 500 2.5
ns
Q or Q)
3.0 to 3.6
1.5
7.0
1.5
8.0
t_S
Setup Time, HIGH or
2.7
2.5
LOW level D to CK _{3.0 to 3.6} ^{50 500 2.5}
2.5
3.5
3.5
ns
t_h
Hold Time, HIGH or
2.7
1.5
LOW level D to CK _{3.0 to 3.6} ^{50 500 2.5}
1.5
1.5
1.5
ns
t_W
CK Pulse Width,
2.7
3.0
4.0
HIGH or LOW
PR or CLR Pulse
50 500 2.5
3.0 to 3.6
3.0
4.0
ns
Width, LOW
t_rec
Recovery Time PR
or CLR to CK
2.7
3.0 to 3.6
50 500 2.5
0
0
0
ns
0
f_MAX
Clock Pulse
Frequency
2.7
50 500 2.5 150
150
MHz
t_OSLH Output To Output
3.0 to 3.6 50 500 2.5
1.0
t_OSHL ^{Skew Time (note1,}
2)
1.0
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t_OSLH = | t_PLHm - t_PLHn|, t_OSHL = | t_PHLm - t_PHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
V_CC
(V)
T_A = 25 °C
Unit
Min. Typ. Max.
C_IN Input Capacitance
3.3
V_IN = 0 to V_CC
6
pF
C_PD Power Dissipation Capacitance
3.3
(note 1)
f_IN = 10MHz
V_IN = 0 or V_CC
40
pF
1) C_PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I_CC(opr) = C_PD x V_CC x f_IN + I_CC/2 (per
Fli p-Flop)
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