74LCX574 Datasheet, PDF (5/13 Pages) Fairchild Semiconductor – Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

74LCX574
Table 8: AC Electrical Characteristics
Test Condition
Value
Symbol
Parameter
t_PLH t_PHL
t_PZL t_PZH
t_PLZ t_PHZ
t_S
t_h
t_W
f_MAX
t_OSLH
t_OSHL
Propagation Delay
Time
Output Enable Time
to HIGH and LOW
level
Output Disable Time
from HIGH to LOW
level
Set-Up Time, HIGH
or LOW level
(Dn to CK)
Hold Time, HIGH or
LOW level
(Dn to CK)
CK Pulse Width,
HIGH or LOW
Clock Pulse
Frequency
Output To Output
Skew Time (note1,
2)
V_CC
(V)
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
C_L R_L t_s = t_r
(pF) (Ω) (ns)
50 500 2.5
50 500 2.5
50 500 2.5
50 500 2.5
50 500 2.5
50 500 2.5
50 500 2.5
50 500 2.5
-40 to 85 °C
Min.
1.5
1.5
1.5
Max.
9.5
8.5
9.5
1.5
8.5
1.5
8.5
1.5
7.5
2.5
2.5
1.5
1.5
3.3
3.3
165
1.0
-55 to 125 °C
Min.
1.5
1.5
1.5
Max.
9.5
8.5
9.5
1.5
8.5
1.5
8.5
1.5
7.5
2.5
2.5
1.5
1.5
3.3
3.3
150
1.0
Unit
ns
ns
ns
ns
ns
ns
MHz
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t_OSLH = | t_PLHm - t_PLHn|, t_OSHL = | t_PHLm - t_PHLn|)
2) Parameter guaranteed by design
Table 9: Capacitive Characteristics
Test Condition
Value
Symbol
Parameter
V_CC
(V)
C_IN Input Capacitance
3.3
C_OUT Output Capacitance
3.3
C_PD Power Dissipation Capacitance
3.3
(note 1)
V_IN = 0 to V_CC
V_IN = 0 to V_CC
f_IN = 10MHz
V_IN = 0 or V_CC
T_A = 25 °C
Unit
Min. Typ. Max.
6
pF
12
pF
25
pF
1) C_PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I_CC(opr) = C_PD x V_CC x f_IN + I_CC/8 (per
flip-flop)
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