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74LCX373 Datasheet, PDF (5/10 Pages) Fairchild Semiconductor – Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX373
AC ELECTRICAL CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC
CL RL ts = tr -40 to 85 °C
-55 to 125 °C Unit
(V)
(pF) (Ω) (ns) Min. Max. Min. Max.
tPLH tPHL Propagation Delay
Time (Dn to Qn)
2.7
3.0 to 3.6
50 500 2.5
1.5
1.5
9.0
8.0
1.5
1.5
9.0
8.0
ns
tPLH tPHL Propagation Delay
Time (LE to Qn)
2.7
3.0 to 3.6
50 500 2.5
1.5
1.5
9.5
8.5
1.5
1.5
9.5
8.5
ns
tPZL tPZH Output Enable Time
2.7
1.5
9.5
1.5
9.5
to HIGH and LOW
50 500 2.5
ns
level
3.0 to 3.6
1.5
8.5
1.5
8.5
tPLZ tPHZ Output Disable Time
2.7
1.5
8.5
1.5
8.5
from HIGH to LOW
50 500 2.5
ns
level
3.0 to 3.6
1.5
7.5
1.5
7.5
tS
Set-Up Time, HIGH
2.7
2.5
2.5
or LOW level
50 500 2.5
ns
(Dn to LE)
3.0 to 3.6
2.5
2.5
th
Hold Time, HIGH or
2.7
1.5
1.5
LOW level
50 500 2.5
ns
(Dn to LE)
3.0 to 3.6
1.5
1.5
tW
LE Pulse Width,
HIGH
2.7
3.3
50 500 2.5
3.0 to 3.6
3.3
3.3
3.3
ns
tOSLH Output To Output
3.0 to 3.6 50 500 2.5
1.0
tOSHL
Skew Time (note1,
2)
1.0
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25 °C
Unit
Min. Typ. Max.
CIN
Input Capacitance
3.3
VIN = 0 to VCC
6
pF
COUT Output Capacitance
3.3
VIN = 0 to VCC
12
pF
CPD Power Dissipation Capacitance
3.3
(note 1)
fIN = 10MHz
VIN = 0 or VCC
50
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per latch)
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