74LCX16374 Datasheet, PDF (5/10 Pages) Fairchild Semiconductor – Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

74LCX16374
AC ELECTRICAL CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
V_CC
C_L R_L t_s = t_r ^{-40 to 85 °C}
-55 to 125 °C Unit
(V)
(pF) (Ω) (ns) _{Min. Max. Min. Max.}
t_PLH t_PHL Propagation Delay
Time
2.7
3.0 to 3.6
50 500 2.5
1.5
1.5
6.5
6.2
1.5
1.5
6.5
6.2
ns
t_PZL t_PZH Output Enable Time
2.7
1.5
6.3
1.5
6.3
to HIGH and LOW
50 500 2.5
ns
level
3.0 to 3.6
1.5
6.1
1.5
6.1
t_PLZ t_PHZ Output Disable Time
2.7
1.5
6.2
1.5
6.2
from HIGH and LOW
50 500 2.5
ns
level
3.0 to 3.6
1.5
6.0
1.5
6.0
t_S
Set-Up Time, HIGH
2.7
2.5
2.5
or LOW level
50 500 2.5
ns
(Dn to CK)
3.0 to 3.6
2.5
2.5
t_h
Hold Time, HIGH or
2.7
1.5
1.5
LOW level
50 500 2.5
ns
(Dn to CK)
3.0 to 3.6
1.5
1.5
t_W
CK Pulse Width,
HIGH or LOW
2.7
3.0
50 500 2.5
3.0 to 3.6
3.0
3.0
3.0
ns
f_MAX
Clock Pulse
Frequency
3.0 to 3.6 50 500 2.5 170
150
MHz
t_OSLH Output To Output
3.0 to 3.6 50 500 2.5
1.0
t_OSHL ^{Skew Time (note1,}
2)
1.0
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t_OSLH = | t_PLHm - t_PLHn|, t_OSHL = | t_PHLm - t_PHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
V_CC
(V)
T_A = 25 °C
Unit
Min. Typ. Max.
C_IN
Input Capacitance
3.3
V_IN = 0 to V_CC
7
pF
C_OUT Output Capacitance
3.3
V_IN = 0 to V_CC
8
pF
C_PD Power Dissipation Capacitance
3.3
(note 1)
f_IN = 10MHz
V_IN = 0 or V_CC
20
pF
1) C_PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I_CC(opr) = C_PD x V_CC x f_IN + I_CC/16 (per
circuit)
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