STM8TL52X4 Datasheet, PDF (41/84 Pages) STMicroelectronics – Operating conditions

STM8TL52x4 STM8TL53x4
Option byte
Table 11. Option byte description (continued)
Option byte number
Description
OPT2
DATASIZE[7:0] Size of the data EEPROM area
0x00: no data EEPROM area
0x01: 1 page reserved for data storage from 0xBFC0 to 0xBFFF
0x02: 2 pages reserved for data storage from 0xBF80 to 0xBFFF
...
0x20: 32 pages reserved for data storage from 0xB800 to 0xBFFF
Refer to Data EEPROM (DATA) section in the STM8TL5xxx reference
manual (RM0312) for more details.
OPT3
PCODESIZE[7:0] Size of the proprietary code area
0x00: No proprietary code area
0x03: TRAP vector and page 2 (0x8080 to 0x80BF) reserved for the
proprietary code and read/write protected
...
0xFF: TRAP vector and page 2 to 254 (0x8080 to 0xBFBF) reserved for
the proprietary code and read/write protected
Refer to Proprietary code area (PCODE) section in the STM8TLxxxx
Programming Manual(PM0212) for more details.
IWDG_HW: Independent watchdog
0: Independent watchdog activated by software
1: Independent watchdog activated by hardware
OPT4
IWDG_HALT: Independent window watchdog reset on Halt/Active-halt
0: Independent watchdog continues running in Halt/Active-halt mode
1: Independent watchdog stopped in Halt/Active-halt mode
WWDG_HW: Window watchdog
0: Window watchdog activated by software
1: Window watchdog activated by hardware
WWDG_HALT: Window watchdog reset on Halt/Active-halt
0: Window watchdog stopped in Halt/Active-halt mode
1: Window watchdog continues running in Halt/Active-halt mode
Caution: After a device reset, read access to the program memory is not guaranteed if address
0x4807 is not programmed to 0x00.
DocID022344 Rev 7
41/84
41