ST5092 Datasheet, PDF (4/29 Pages) STMicroelectronics – 2.7V SUPPLY 14-BIT LINEAR CODEC WITH HIGH-PERFORMANCE AUDIO FRONT-END

ST5092
PIN FUNCTIONS (TQFP44)
Pin Name
Description
1
N.C. Not Connected.
2,3 V_Fr+, V_Fr– Receive analog earpiece amplifier complementary outputs. These outputs can drive directly earpiece
transductor. The signal at this output can be the summ of:
- Receive Speech signal from D_R,
- Internal Tone Generator,
- Sidetone signal.
4
N.C. Not Connected.
5,6 V_Lr+, V_Lr– Receive analog extra amplifier complementary outputs. The signal at these outputs can be the sum of:
- Receive Speech signal from DR,
- Internal Tone generator,
- Sidetone signal.
7
N.C. Not Connected.
8
GNDP Power ground. V_Fr and V_Lr driver are referenced to this pin. GNDP and GND must be connected
together close to the device.
9
N.C. Not Connected.
10
D_R Receive data input: Data is shifted in during the assigned Received time slots In delayed and non-
delayed normal frame synchr. modes voice data byte is shifted in at the MCLK frequency on the
falling edges of MCLK, while in non-delayed reverse frame sinchr. mode voice data byte is shifted
in at the MCLK frequency on the rising edges of MCLK.
11,12,13 N.C. Not Connected.
14
CCLK Control Clock input: This clock shifts serial control information into CI and out from CO when the
CS- input is low, depending on the current instruction. CCLK may be asynchronous with the other
system clocks.
15
CS- Chip Select input: When this pin is low, control information is written into and out from the ST5092
via CI and CO pins.
16
CI Control data Input: Serial Control information is shifted into the ST5092 on this pin when CS- is low
on the rising edges of CCLK.
17
BZ Pulse width modulated buzzer driver output.
18
V_CC Positive power supply input for the digital section.
19
CO Control data Output: Serial control/status information is shifted out from the ST5092 on this pin
when CS- is low on the falling edges of CCLK.
20
D_X Transmit Data ouput: Data is shifted out on this pin during the assigned transmit time slots. Elsewhere
D_X output is in the high impendance state. In delayed and non-delayed normal frame synchr. modes,
voice data byte is shifted out from TRISTATE output D_X at the MCLK on the rising edge of MCLK, while
in non-delayed reverse frame synchr mode voice data byte is shifted out on the falling edge of MCLK.
21
GND Ground: All digital signals are referenced to this pin.
22,23 N.C. Not Connected.
24
FS Frame Sync input: This signal is a 8kHz clock which defines the start of the transmit and receive
frames. Either of three formats may be used for this signal: non delayed normal mode, delayed
mode, and non delayed reverse mode.
25 MCLK Master Clock Input: This signal is used by the switched capacitor filters and the encoder/decoder
sequencing logic. Values must be 512 kHz, 1.536 MHz, 2.048 MHz or 2.56 MHz selected by means of
Control Register CRO. MCLK is used also to shift-in and out data.
26
LO A logic 1 written into DO (CR1) appears at LO pin as a logic 0
A logic 0 written into DO (CR1) appears at LO pin as a logic 1.
27,28,29 N.C. Not Connected.
30 MIC2- Second negative high impedance input to transmit pre-amplifier for microphone connection.
31 MIC2+ Second Positive high impedance input to transmit pre-amplifier for microphone connection.
32
N.C. Not Connected.
33 MIC1- Negative high impedance input to transmit pre-amplifier for microphone connection.
34 MIC1+ Positive high impedance input to transmit pre-amplifier for microphone connection.
35
N.C. Not Connected.
36 GNDA Analog Ground: All analog signals are referenced to this pin. GND and GNDA must be connected
together close to the device.
37 MIC3- Third negative high impedance output to transmit preamplifier for microphone connection.
38 MIC3+ Third positive high impedance output to transmit preamplifier for microphone connection.
39,40 N.C. Not Connected.
41
V_CCA Positive power supply input for the analog section.
VCC and VCCA must be directly connect ed t oget her.
42
43,44
V_CCP Positive power supply input for the power section. V_CCP and V_CC must be connected together.
N.C. Not Connected.
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