HCC40110B Datasheet, PDF (4/11 Pages) STMicroelectronics – DECADE UP-DOWN COUNTER/DECODER/LATCH/DRIVER

HCC/HCF40110B
LOGIC DIAGRAM (continued)
DISPLAY SEGMENTS
Ouptut Low (sink) Current Characterisitcs.
TRUTH TABLE
CLOCK UP*
CLOCK
DOWN*
X
LATCH
ENABLE
0
TOGGLE
ENABLE
0
RESET
0
COUNTER
DISPLAY
Increments by 1 Follows Counter
X
0
0
0
Decrement by 1 Follows Counter
X
X
0
No Change
No Change
X
X
X
X
1
Goes to 00000
Follows Counter
(Display = 0 )
X
X
X
1
0
Inhibited
Remains Fixed
X
1
0
0
Increments by 1 Remains Fixed
X
1
0
0
Decrement by 1 Remains Fixed
x = Don’t care 1 = High State 2 = Low State
* Typically 100 ns between clock-up and clock-down positive transitions are required to ensure proper counting
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