AN1504 Datasheet, PDF (4/9 Pages) ON Semiconductor – Metastability and the ECLinPS Family

STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER
2 FIRST CASE: OLVL2=1 AND OLVL1=0
In this case, to force a high state on the OCMP1 pin when the timer is started:
– Initialize the timer in PWM mode and set the PWM frequency with a 0% duty cycle
– Reset the timer (at FFFC)
– Load the OC1R register with a value close to FFFC (FFFD for example) and configure
OLVL1=1 and OLVL2=0.
– Start the timer. It immediately reaches the value of the OC1R register and OCMP1 pin goes
into the state defined by the OLVL1 bit, which is high.
– Then, write the correct duty cycle value in the OC1R register and the correct state in the
OLVL2 and OLVL1 bits (OLVL2=1 and OLVL1=0).
The following code gives an example of how to restart (or start) the 16-bit timer this way. This
is for Timer A already initialized in PWM mode at 10KHz with the 16-bit timer clocked at 1MHz
(TACR2=10011000, TAOC2HR=$00 and TAOC2LR=$5F for 10KHz at 1MHz clock.
This is how to calculate the values to be put in the registers:
– OC2R represents the signal period. The frequency is 10KHz, so the period is t=100µs. f_CPU
is 8MHz and the Timer prescaler is 8 because the Timer is at 1MHz.
OC2R=((t*Fcpu)/presc)-5=((100.10-6*8.10+6)/8)-5=95 (005F in hexadecimal).
– OC1R represents the pulse length, the duty cycle is 50% so the pulse length is
100µs*50%=50µs. So the value to be put in OC1R is:
OC1R=((50.10-6*8.10+6)/8)-5=45 (002D in hexadecimal).
Note: This method can be applied when the counter is first started as the starting value is
0000.
Initialization: In this example the duty cycle is first set to 0% with OLVL1=0 and OLVL2=0
ld A,#%00000000; set OLVL1=0 and OLVL2=0
ld TACR1,A
ld A,#%10011000; clock in/8=1MHz with 16 MHz quartz
ld TACR2,A
ld A,#$00
ld TAOC2HR,A ;10KHz frequency for the PWM signal (see formulas)
ld A,#$5F
ld TAOC2LR,A
Synchronization
ld A,#%00000001;Set OLVL1=1 and OLVL2=0
ld TACR1,A ;load corresponding control register 1
ld A,#$FF
ld TAOC1HR,A ;fix compare 1 to FFFD to force PWM high as soon as possible
ld A,#$FD
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